ISHIURA Nagisa
Degree 【 display / non-display 】
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Degree name:京都大学工学博士
Classified degree field:Informatics / Computer system
Conferring institution:Kyoto University
Acquisition way:Thesis
Date of acquisition:1991.03 -
Degree name:Master of Engineering
Classified degree field:Informatics / Computer system
Conferring institution:Kyoto University
Acquisition way:Coursework
Date of acquisition:1986.03 -
Degree name:Bachelor of Engineering
Classified degree field:Informatics / Computer system
Conferring institution:Kyoto University
Acquisition way:Coursework
Date of acquisition:1984.03
Career 【 display / non-display 】
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Affiliation:Kwansei Gakuin University
Title:Professor
Date:2002.04 -
Association Memberships 【 display / non-display 】
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Academic society name:IEEE
Academic country located:Japan -
Academic society name:ACM
Academic country located:Japan -
Academic society name:電子情報通信学会
Academic country located:Japan -
Academic society name:情報処理学会
Academic country located:Japan
Research Areas 【 display / non-display 】
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Research field:Informatics / Computer system
Papers 【 display / non-display 】
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Language: English
Title: Detecting Missed Arithmetic Optimization in C Compilers by Differential Random Testing
Journal name: Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016) (p.2 - 3)
Date of publication: 2016.10
Author(s): M. Iwatsuji, A. Hashimoto, and N. IshiuraType of publication: Research paper (international conference proceedings)
Co-author classification: Multiple Authorship
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Language: English
Title: Random Testing of C Compilers Based on Test Program Generation by Equivalence Transformation
Journal name: Proc. Asia and Pacific Conference on Circuits and Systems (APCCAS 2016) (p.676 - 679)
Date of publication: 2016.10
Author(s): K. Nakamura and N. IshiuraType of publication: Research paper (international conference proceedings)
Co-author classification: Single Author
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Language: English
Title: Introducing Real Constraints in Partitioned ILP-Based Biding in High-Level Synthesis
Journal name: Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016) (p.303 - 304)
Date of publication: 2016.10
Author(s): N. Ishiura and Y. OosakoType of publication: Research paper (international conference proceedings)
Co-author classification: Multiple Authorship
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Language: English
Title: High-Level Synthesis of Embedded Systems Controller from Erlang
Journal name: Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016) (p.285 - 290)
Date of publication: 2016.10
Author(s): H. Takebayashi, N. Ishiura, K. Azuma, N. Yoshida, and H. KanbaraType of publication: Research paper (international conference proceedings)
Co-author classification: Multiple Authorship
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Language: English
Title: Extending Distributed Control for High-Level Synthesis beyond Borders of Basic Blocks
Journal name: Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016) (p.172 - 177)
Date of publication: 2016.10
Author(s): M. Shimizu and N. IshiuraType of publication: Research paper (international conference proceedings)
Co-author classification: Multiple Authorship
MISC 【 display / non-display 】
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Language:Japanese
Title:Compiler Fuzzing1
Publisher:IEICE
Journal name:IEICE Fundamentals Review vol.9 (3) (p.188 - 196)
Date of publication:2016.01
Author(s): Nagisa IshiuraType of publication:Article, review, commentary, editorial, etc. (bulletin of university, research institution)
Industrial Property Rights 【 display / non-display 】
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Property type:Patent
Title:リアルタイム処理装置及びその作製方法
Inventor(s)/Creator(s):石浦菜岐佐,大迫裕樹
Application number:特願2018-029244, 2018.02.21
Patent/Registration number:特許第7112058号,
Country:Japan
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Property type:Patent
Title:マイグレーション装置、目的ソースの生産方法、およびプログラム
Inventor(s)/Creator(s):石浦菜岐佐,他
Application number:特願2016-004729, 2016.01.13
Country:Japan
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Property type:Patent
Title:ドキュメント生成装置、ドキュメントの生産方法、およびプログラム
Inventor(s)/Creator(s):石浦菜岐佐
Application number:特願2015-188841, 2015.09.25
Country:Japan
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Property type:Patent
Title:ドキュメント生成装置、ドキュメントの生産方法、およびプログラム
Inventor(s)/Creator(s):石浦菜岐佐,他
Application number:特願2015-188841, 2015.09.25
Country:Japan
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Property type:Patent
Title:マイグレーション装置、プログラムの製造方法、およびプログラム
Inventor(s)/Creator(s):石浦菜岐佐
Application number:特願2015-177171, 2015.09.09
Country:Japan
Research Projects 【 display / non-display 】
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Research category:基盤研究(C)
Project year:2024.04 - 2027.03
Title:RTOS利用システムのフルハードウェア化の実用化に関する研究
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Research category:Grant-in-Aid for Scientific Research(B)
Project year:2019.04 - 2022.03
Title:リアルタイムOS利用システムのフルハードウェア自動合成に関する研究
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Research category:Grant-in-Aid for Scientific Research(C)
Project year:2016.04 - 2019.03
Title:バイナリ合成における割り込み制御および動的制御のハードウェア化に関する研究
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Research category:Grant-in-Aid for Scientific Research(C)
Project year:2013.04 - 2016.03
Title:正確な期待値計算および生成コードの記号実行に基づくコンパイラのランダムテスト
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Project year:2011.08 - 2012.03
Title:バイナリコードからのMPUアクセラレータの自動生成(研究成果展開事業 研究成果最適展開支援プログラムA-STEP探索タイプ)
Awarding organization:独立行政法人科学技術振興機構
Presentations 【 display / non-display 】
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Language:Japanese
Conference name:電子情報通信学会技術研究報告, VLD2013-133
International/Domestic presentation:Domestic presentation
Holding date:2014.01
Title:CPU密結合型アクセラレータの機械語プログラムからの自動合成
Presentation type:Oral presentation (general)
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Language:Japanese
Conference name:電子情報通信学会技術研究報告, VLD2013-128
International/Domestic presentation:Domestic presentation
Holding date:2014.01
Title:不定サイクル演算に対応した分散制御における動的演算バインディング
Presentation type:Oral presentation (general)
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Language:Japanese
Conference name:電子情報通信学会技術研究報告, VLD2013-132
International/Domestic presentation:Domestic presentation
Holding date:2014.01
Title:PerlのためのCUDAバインディングフレームワークPerCUDA
Presentation type:Oral presentation (general)
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Language:Japanese
Conference name:電子情報通信学会技術研究報告, VLD2012-119
International/Domestic presentation:Domestic presentation
Holding date:2013.01
Title:機械語の複数部分を高速化するCPU密結合型ハードウェアアクセラレータ
Presentation type:Oral presentation (general)
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Language:Japanese
Conference name:電子情報通信学会技術研究報告, VLD2012-119
International/Domestic presentation:Domestic presentation
Holding date:2013.01
Title:機械語の複数部分を高速化するCPU密結合型ハードウェアアクセラレータ
Presentation type:Oral presentation (general)