Personnel Information

写真b

ISHIURA Nagisa

Organization
School of Engineering Program of Computer Science Professor
Laboratory Address
School of Science and Technology, Kwansei Gakuin University, 2-1 Gakuen, Sanda, Hyogo, 669-1337, Japan
Research Fields, Keywords
Computer-Aided Design of VLSIs, Compilers, Compilers, Computer Science, Computer-Aided Design of VLSIs, VLSIの計算機援用設計, コンパイラ, 計算機科学
Teaching and Research Fields
集積回路の計算機援用設計, コンパイラ
SDGs Related Goals

Degree 【 display / non-display

  • Degree name:京都大学工学博士
    Classified degree field:Informatics / Computer system
    Conferring institution:Kyoto University
    Acquisition way:Thesis
    Date of acquisition:1991.03

  • Degree name:Master of Engineering
    Classified degree field:Informatics / Computer system
    Conferring institution:Kyoto University
    Acquisition way:Coursework
    Date of acquisition:1986.03

  • Degree name:Bachelor of Engineering
    Classified degree field:Informatics / Computer system
    Conferring institution:Kyoto University
    Acquisition way:Coursework
    Date of acquisition:1984.03

Career 【 display / non-display

  • Affiliation:Kwansei Gakuin University
    Title:Professor
    Date:2002.04 -

Association Memberships 【 display / non-display

  • Academic society name:IEEE
    Academic country located:Japan

  • Academic society name:ACM
    Academic country located:Japan

  • Academic society name:電子情報通信学会
    Academic country located:Japan

  • Academic society name:情報処理学会
    Academic country located:Japan

  • Academic society name:電子情報通信学会
    Academic country located:Japan

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Research Areas 【 display / non-display

  • Research field:Informatics / Computer system

  • Research field:Informatics / Computer system

Papers 【 display / non-display

  • Title: Enumeration of Genaralized Parallel Counters for Multi-Input Adder Synthesis for FPGAs
    Journal name: 2024 IEEE THE 20TH ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS 2024  (p.64 - 68)
    Date of publication: 2024
    Author(s): Noda, M; Ishiura, N

    DOI: 10.1109/APCCAS62602.2024.10808619

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  • Title: Full Hardware Implementation of FreeRTOS-Based Real-Time Systems
    Journal name: 2021 IEEE REGION 10 CONFERENCE (TENCON 2021)  (p.435 - 440)
    Date of publication: 2021
    Author(s): Nakano, W; Shinohara, Y; Ishiura, N

    DOI: 10.1109/TENCON54134.2021.9707328

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  • Language: English
    Title: Detecting Missed Arithmetic Optimization in C Compilers by Differential Random Testing
    Journal name: Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016)  (p.2 - 3)
    Date of publication: 2016.10
    Author(s): M. Iwatsuji, A. Hashimoto, and N. Ishiura

    Type of publication: Research paper (international conference proceedings)
    Co-author classification: Multiple Authorship

  • Language: English
    Title: Random Testing of C Compilers Based on Test Program Generation by Equivalence Transformation
    Journal name: Proc. Asia and Pacific Conference on Circuits and Systems (APCCAS 2016)  (p.676 - 679)
    Date of publication: 2016.10
    Author(s): K. Nakamura and N. Ishiura

    Type of publication: Research paper (international conference proceedings)
    Co-author classification: Single Author

  • Language: English
    Title: Introducing Real Constraints in Partitioned ILP-Based Biding in High-Level Synthesis
    Journal name: Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016)  (p.303 - 304)
    Date of publication: 2016.10
    Author(s): N. Ishiura and Y. Oosako

    Type of publication: Research paper (international conference proceedings)
    Co-author classification: Multiple Authorship

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MISC 【 display / non-display

  • Language:Japanese
    Title:Compiler Fuzzing1
    Publisher:IEICE
    Journal name:IEICE Fundamentals Review  vol.9  (3)  (p.188 - 196)
    Date of publication:2016.01
    Author(s): Nagisa Ishiura

    Type of publication:Article, review, commentary, editorial, etc. (bulletin of university, research institution)

Industrial Property Rights 【 display / non-display

  • Property type:Patent
    Title:リアルタイム処理装置及びその作製方法
    Inventor(s)/Creator(s):石浦菜岐佐,大迫裕樹

    Application number:特願2018-029244, 2018.02.21
    Patent/Registration number:特許第7112058号,
    Country:Japan

  • Property type:Patent
    Title:マイグレーション装置、目的ソースの生産方法、およびプログラム
    Inventor(s)/Creator(s):石浦菜岐佐,他

    Application number:特願2016-004729, 2016.01.13
    Country:Japan

  • Property type:Patent
    Title:ドキュメント生成装置、ドキュメントの生産方法、およびプログラム
    Inventor(s)/Creator(s):石浦菜岐佐,他

    Application number:特願2015-188841, 2015.09.25
    Country:Japan

  • Property type:Patent
    Title:ドキュメント生成装置、ドキュメントの生産方法、およびプログラム
    Inventor(s)/Creator(s):石浦菜岐佐

    Application number:特願2015-188841, 2015.09.25
    Country:Japan

  • Property type:Patent
    Title:マイグレーション装置、プログラムの製造方法、およびプログラム
    Inventor(s)/Creator(s):石浦菜岐佐,他

    Application number:特願2015-177171, 2015.09.09
    Country:Japan

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Research Projects 【 display / non-display

  • Research category:基盤研究(C)
    Project year:2024.04 - 2027.03
    Title:RTOS利用システムのフルハードウェア化の実用化に関する研究

  • Research category:Grant-in-Aid for Scientific Research(B)
    Project year:2019.04 - 2022.03
    Title:リアルタイムOS利用システムのフルハードウェア自動合成に関する研究

  • Research category:Grant-in-Aid for Scientific Research(C)
    Project year:2016.04 - 2019.03
    Title:バイナリ合成における割り込み制御および動的制御のハードウェア化に関する研究

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  • Research category:Grant-in-Aid for Scientific Research(C)
    Project year:2013.04 - 2016.03
    Title:正確な期待値計算および生成コードの記号実行に基づくコンパイラのランダムテスト

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  • Project year:2011.08 - 2012.03
    Title:バイナリコードからのMPUアクセラレータの自動生成(研究成果展開事業 研究成果最適展開支援プログラムA-STEP探索タイプ)
    Awarding organization:独立行政法人科学技術振興機構

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Presentations 【 display / non-display

  • Language:Japanese
    Conference name:電子情報通信学会技術研究報告, VLD2013-133
    International/Domestic presentation:Domestic presentation
    Holding date:2014.01
    Title:CPU密結合型アクセラレータの機械語プログラムからの自動合成
    Presentation type:Oral presentation (general)

  • Language:Japanese
    Conference name:電子情報通信学会技術研究報告, VLD2013-128
    International/Domestic presentation:Domestic presentation
    Holding date:2014.01
    Title:不定サイクル演算に対応した分散制御における動的演算バインディング
    Presentation type:Oral presentation (general)

  • Language:Japanese
    Conference name:電子情報通信学会技術研究報告, VLD2013-132
    International/Domestic presentation:Domestic presentation
    Holding date:2014.01
    Title:PerlのためのCUDAバインディングフレームワークPerCUDA
    Presentation type:Oral presentation (general)

  • Language:Japanese
    Conference name:電子情報通信学会技術研究報告, VLD2012-119
    International/Domestic presentation:Domestic presentation
    Holding date:2013.01
    Title:機械語の複数部分を高速化するCPU密結合型ハードウェアアクセラレータ
    Presentation type:Oral presentation (general)

  • Language:Japanese
    Conference name:電子情報通信学会技術研究報告, VLD2012-119
    International/Domestic presentation:Domestic presentation
    Holding date:2013.01
    Title:機械語の複数部分を高速化するCPU密結合型ハードウェアアクセラレータ
    Presentation type:Oral presentation (general)

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Teaching Experience (Off-campus) 【 display / non-display

  • Subject:コンパイラ
    Institution name:Kwansei Gakuin University

  • Subject:論理回路
    Institution name:Kwansei Gakuin University

  • Subject:情報システム領域実習B
    Institution name:Kwansei Gakuin University

  • Subject:情報システム領域実習A
    Institution name:Kwansei Gakuin University

  • Subject:外国書講読
    Institution name:Kwansei Gakuin University

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